The raven_spi is a standalone SPI slave module that services a handful of signals that the Raven SoC CPU cannot manage because they directly affect the operation of the CPU, including enabling the CPU power and several control signals for the CPU clock. Additional diagnostic signals are provided for manual reset and interrupt of the CPU, and for monitoring the CPU fault state. This 3.3V digital subsystem is specifically designed for use with the Raven SoC.
Name | Description | Type | Direction | Vmin | Vmax |
---|---|---|---|---|---|
VDD | Power supply | power | inout | 3.0 | 3.6 |
GND | Ground | ground | inout | 0.0 | 0.0 |
RST | Master SPI reset | signal | input | -0.5 | VDD + 0.3 |
SCK | SPI clock | signal | input | -0.5 | VDD + 0.3 |
SDI | SPI data input | signal | input | -0.5 | VDD + 0.3 |
CSB | SPI chip select (sense inverted) | signal | input | -0.5 | VDD + 0.3 |
SDO | SPI data output | signal | output | -0.5 | VDD + 0.3 |
sdo_enb | SPI data output enable (sense inverted) | signal | output | -0.5 | VDD + 0.3 |
xtal_ena | Crystal oscillator enable | signal | output | -0.5 | VDD + 0.3 |
reg_ena | 1.8V regulator enable | signal | output | -0.5 | VDD + 0.3 |
pll_vco_ena | PLL VCO enable | signal | output | -0.5 | VDD + 0.3 |
pll_cp_ena | PLL charge pump enable | signal | output | -0.5 | VDD + 0.3 |
pll_bias_ena | PLL bias current enable | signal | output | -0.5 | VDD + 0.3 |
pll_trim<3:0> | PLL frequency trim | digital | output | -0.5 | VDD + 0.3 |
pll_bypass | PLL bypass | signal | output | -0.5 | VDD + 0.3 |
irq | CPU interrupt request | signal | output | -0.5 | VDD + 0.3 |
reset | CPU force reset | signal | output | -0.5 | VDD + 0.3 |
trap | CPU fault | signal | input | -0.5 | VDD + 0.3 |
mask_rev_in<3:0> | Mask revision (metal programmed) | digital | input | -0.5 | VDD + 0.3 |
mfgr_id<11:0> | Manufacturer ID output to CPU | digital | output | -0.5 | VDD + 0.3 |
prod_id<7:0> | Product ID output to CPU | digital | output | -0.5 | VDD + 0.3 |
mask_rev<3:0> | Mask revision output to CPU | digital | output | -0.5 | VDD + 0.3 |
Parameter | Typical | Minimum | Maximum | Units |
---|---|---|---|---|
device_area | µm² | |||
area | µm² | |||
width | µm | |||
height | µm | |||
DRC_errors | ||||
LVS_errors |
Figure 1
RAVEN_SPI
community
Hard IP
180nm
efabless
X-FAB
EFXH018D
Bandgap
$0
$0
layout
5
5.0
Jul 20, 2018