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The XBG_1V23LC_V01 is an embedded ultra-low power bandgap reference block which operates with 3.3V power supply. In Standby Mode (PDn = 'L') the power consumption is minimal, VBG will be pulled to ground level. The bandgap IP will be activated with the rising edge of signal PDn (PDn = 'H') and generates an output voltage of 1.23V on pin VBG. The output voltage can be trimmed via signals TR_BG[3:0] in 16 steps. The default combination is 4'b0000.

  • Required Modules MOS
  • Low Power Consumption < 3.5µA
  • Operating Temperature Range -40°C to 125°C
  • IP size < 200µm x 300µm

Pins

Name Description Type Direction Vmin Vmax
VBG Bandgap reference voltage output signal output -0.5 VDD33A + 0.3
PDn Power-down input (active low) signal input -0.5 VDD33A + 0.3
TR_BG[3:0] Output voltage trim setting digital input -0.5 VDD33A + 0.3
VDD33A Positive power supply power inout 3.0 3.6
VSSA Ground ground inout 0 0
VBBA Substrate substrate inout 0 0

Global Conditions

Name Typical Minimum Maximum Units
VDD 3.3 V
Ground 0 V
Substrate 0 V
Enable 3.3 V
Trim 0000 1000 0111
RLoad 100
CLoad 1 pF
Temp 27 -40 125 °C
Sigma 3
Corner tm ws wp
VDDRISE 100 ns

Electrical Parameters

Parameter Pin Typical Minimum Maximum Units Conditions
Line Regulation (Voltage Coefficient) VBG -74.19 -509.9 89.58 ppm/V Conditions
Load Regulation VBG 0.002086 0.0008732 0.004644 mV/µA Conditions
Temperature Coefficient VBG 140.9 -140.9 140.9 ppm/°C Conditions
Input Low Voltage TR_BG[3:0] 45.83 %VDD Conditions
Input High Voltage TR_BG[3:0] 51.69 %VDD Conditions
Input Leakage Current TR_BG[3:0] 1.32e-13 µA Conditions
PSRR positive at 100kHz VBG -69.36 -60.94 dB Conditions
PSRR positive at 1MHz VBG -50.69 -47.6 dB Conditions
PSRR negative at 100kHz VBG -10.57 -10.37 dB Conditions
Power VDD33A 10.16 14.07 µW Conditions
IDD33A VDD33A 2.877 3.258 µA Conditions
IDD33A (standby) VDD33A 0.5214 0.6313 µA Conditions
VBG (maximum trim) VBG 1.162 1.155 1.171 V Conditions
VBG (trim setting 4, corners) VBG 1.193 1.183 1.21 V Conditions
VBG (trim setting 2) VBG 1.205 1.205 1.205 V Conditions
VBG (trim setting 1) VBG 1.215 1.215 1.215 V Conditions
VBG (nominal trim) VBG 1.232 1.225 1.238 V Conditions
VBG (trim setting -1) VBG 1.235 1.235 1.235 V Conditions
VBG (trim setting -3) VBG 1.256 1.256 1.256 V Conditions
VBG (trim setting -6) VBG 1.286 1.286 1.286 V Conditions
VBG (minimum trim) VBG 1.312 1.305 1.316 V Conditions
TSTARTVDD VBG 0.8417 0.5932 1.127 µs Conditions
Startup VBG 174.1 485.8 µs Conditions
Startup (test) VBG 1.522 V Conditions
VNOISE VBG 78.54 70.94 86.48 µV-rms Conditions

Physical Parameters

Parameter Typical Minimum Maximum Units
device_area 49370 µm²
area 52364.76 µm²
width 285.6 µm
height 183.35 µm
DRC_errors 0
LVS_errors 0

Figure(s)

EFX0002_symbol.svg

Figure 1

Performance Characteristics

ILOADxVBG.png

Plot 1: Load Regulation

VOLTAGExVCVBG.png

Plot 2: Voltage coefficient of VBG vs. VDD33A

TEMPERATURExVBG.png

Plot 3: Bandgap output VBG vs. Temperature

TRIMxVBG.png

Plot 4: Bandgap output VBG vs. TRIM

TEMPERATURExTCVBG.png

Plot 5: Temperature coefficient of VBG (ppm) vs. temperature (°C)

startup.png

Plot 6: Startup (plot)

VOLTAGExVBG.png

Plot 7: Bandgap output VBG vs. VDD33A

Summary

Catalog ID

EFX0002

Provider

N/A

Designer

Syed Arsalan Jawed

Type

Hard IP

Node

350nm

Vendor

Community

Foundry

X-FAB

Process

EFXH035A

Category

Bandgap

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

layout

Library Package

Version

2.0

Version Date

Apr 27, 2018