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The EFX0001 is an embedded ultra-low power bandgap reference block which operates with 3.3V power supply. In Standby Mode (PDn = 'L') the power consumption is minimal, VBG will be pulled to ground level. The bandgap IP will be activated with the rising edge of signal PDn (PDn = 'H') and generates an output voltage of 1.23V on pin VBG. The output voltage can be trimmed via signals TR_BG[3:0] in 16 steps. The default combination is 4'b0000.

  • Required Modules MOS
  • Low Power Consumption < 3.1µA
  • Operating Temperature Range -40°C to 125°C
  • IP size < 200µm x 300µm

Pins

Name Description Type Direction Vmin Vmax
VBG Bandgap reference voltage output signal output -0.5 VDD33A + 0.3
PDn Power-down input (active low) signal input -0.5 VDD33A + 0.3
TR_BG[3:0] Output voltage trim setting digital input -0.5 VDD33A + 0.3
VDD33A Positive power supply power inout 3.0 3.6
VSSA Ground ground inout 0 0
VBBA Substrate substrate inout 0 0

Global Conditions

Name Typical Minimum Maximum Units
VDD (VDD33A) 3.3 V
Ground (VSSA) 0 V
Substrate (VBBA) 0 V
Enable (PDn) 3.3 V
Trim (TR_BG[3:0]) 0000 1000 0111
RLoad (VBG) 100
CLoad (VBG) 1 pF
Temp 27 -40 125 °C
Sigma 3
Corner tm ws wp
VDDRISE (VDD33A) 100 ns

Electrical Parameters

Parameter Pin Typical Minimum Maximum Units Conditions
Line Regulation (Voltage Coefficient) VBG -246.3 -1685 1417 ppm/V Conditions
Load Regulation VBG 4.674 4.59 4.811 mV/µA Conditions
Temperature Coefficient VBG 30.12 -30.12 30.12 ppm/°C Conditions
Input Low Voltage TR_BG[3:0] 0 39.17 %VDD Conditions
Input High Voltage TR_BG[3:0] 50.69 100 %VDD Conditions
Input Leakage Current TR_BG[3:0] 1.32e-11 µA Conditions
PSRR positive at 100kHz VBG -71.59 -65.19 dB Conditions
PSRR positive at 1MHz VBG -42.55 -40.98 dB Conditions
PSRR negative at 100kHz VBG -26.77 -26.17 dB Conditions
Power VDD33A 8.717 12.67 µW Conditions
IDD33A VDD33A 2.565 3.066 µA Conditions
IDD33A (standby) VDD33A 0.0003524 0.0006806 µA Conditions
VBG (maximum trim) VBG 1.176 1.173 1.179 V Conditions
VBG (trim setting 4) VBG 1.203 1.203 1.203 V Conditions
VBG (trim setting 2) VBG 1.22 1.22 1.22 V Conditions
VBG (trim setting 1) VBG 1.229 1.229 1.229 V Conditions
VBG (nominal trim) VBG 1.234 1.231 1.237 V Conditions
VBG (trim setting -1) VBG 1.246 1.246 1.246 V Conditions
VBG (trim setting -3) VBG 1.263 1.263 1.263 V Conditions
VBG (trim setting -6) VBG 1.288 1.288 1.288 V Conditions
VBG (minimum trim) VBG 1.301 1.298 1.304 V Conditions
TSTARTVDD VBG 7.893 0.1385 32.38 µs Conditions
VNOISE VBG 542 483.2 607.2 µV-rms Conditions

Physical Parameters

Parameter Typical Minimum Maximum Units
area 59940.0 µm²
width 300.0 µm
height 199.8 µm
DRC_errors 0
LVS_errors 0

Figure(s)

Performance Characteristics

ILOADxVBG.png

Plot 1

TRIMxVBG.png

Plot 2

VOLTAGExVBG.png

Plot 3

VOLTAGExVCVBG.png

Plot 4

TEMPERATURExVBG.png

Plot 5

TEMPERATURExTCVBG.png

Plot 6

Summary

Catalog ID

MBL_CLONE_EFX0001

IP Provider

N/A

Designer

Kareem Farid

Type

Hard IP

Node

350nm

Vendor

Community

Foundry

X-FAB

Process

EFXH035A

Category

N/A

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

layout

# of Tries

1

Library Package

Version

2.0

Version Date

Mar 21, 2017