Apllc03_1v8 is a 40-100MHz Phase-Lock-Loop clock multiplier circuit with built-in LPF. The cell generates a low jitter, CMOS level output clock whose frequency is 8 times higher than input reference clock.
APLLC03_1V8
Foundry
X-FAB Engineer
Hard IP
180nm
X-FAB
X-FAB
XH018
Oscillator and Clocking
Contact Designer
product
0
1.0
Oct 05, 2017