X-Fab 136-word (8-bit address x 32 bit data) NVRAM
Name | Description | Type | Direction | Vmin | Vmax |
---|---|---|---|---|---|
CLK | memory clock input 4MHz | signal | input | -0.5 | VDD18M + 0.3 |
CLKI | symmetric clock to charge pump | signal | output | -0.5 | VDD18M + 0.3 |
CLK4 | test clock input | signal | input | -0.5 | VDD18M + 0.3 |
TM_NVCP[3:0] | test mode input | digital | input | -0.5 | VDD18M + 0.3 |
TM_NVCPI[3:0] | test mode output | digital | output | -0.5 | VDD18M + 0.3 |
PEIN | test mode signal | digital | input | -0.5 | VDD18M + 0.3 |
RDY | ready signal | signal | output | -0.5 | VDD18M + 0.3 |
VSE1 | page 1 store voltage | signal | input | -10.8 | +12.2 |
VSE2 | page 2 store voltage | signal | input | -10.8 | +12.2 |
MEM_ALLC | memory select | digital | input | -0.5 | VDD18M + 0.3 |
MEM_SEL | memory page select | digital | input | -0.5 | VDD18M + 0.3 |
CE | chip enable | digital | input | -0.5 | VDD18M + 0.3 |
WE | write enable | digital | input | -0.5 | VDD18M + 0.3 |
HR | hardware recall | digital | input | -0.5 | VDD18M + 0.3 |
HS | hardware store | digital | input | -0.5 | VDD18M + 0.3 |
RCLT | recall access state | digital | output | -0.5 | VDD18M + 0.3 |
MEM1_ENT | page 1 voltage enable | digital | output | -0.5 | VDD18M + 0.3 |
MEM2_ENT | page 2 voltage enable | digital | output | -0.5 | VDD18M + 0.3 |
TRIM[15:0] | oscillator trim | digital | output | -0.5 | VDD18M + 0.3 |
VSESTART | start store access | digital | output | -0.5 | VDD18M + 0.3 |
POR | power on reset | digital | input | -0.5 | VDD18M + 0.3 |
VSEBUSY | charge pump state | digital | input | -0.5 | VDD18M + 0.3 |
BUSYNVC | charge pump state | digital | output | -0.5 | VDD18M + 0.3 |
A[7:0] | Memory address bus (8 bits) | digital | input | -0.5 | VDD18M + 0.3 |
DOUT[31:0] | Memory data output (8 bits) | digital | output | -0.5 | VDD18M + 0.3 |
DIN[31:0] | Memory data input (32 bits) | digital | input | -0.5 | VDD18M + 0.3 |
DSI | Serial wrapper input | digital | input | VDD33M | VDD18M + 0.3 |
DRSTN | Serial wrapper reset | digital | input | VDD33M | VDD18M + 0.3 |
DSCLK | Serial wrapper clock | digital | input | VDD33M | VDD18M + 0.3 |
DUP | Serial wrapper update | digital | input | VDD33M | VDD18M + 0.3 |
DSO | Serial wrapper output | digital | output | VDD33M | VDD18M + 0.3 |
VCORE | Core power supply | signal | inout | VDD33M | 5.0 |
VDD18M | Digital power supply | power | inout | 1.62 | 1.98 |
VDD33M | Analog power supply | power | inout | 3.63 | 2.97 |
VSSM | Digital Ground | ground | inout | 0 | 0 |
Name | Typical | Minimum | Maximum | Units |
---|---|---|---|---|
VDD18M | 1.8 | V | ||
VDD33M | 3.3 | V | ||
Ground | 0 | V |
Parameter | Typical | Minimum | Maximum | Units |
---|---|---|---|---|
device_area | µm² | |||
area | µm² | |||
width | µm | |||
height | µm | |||
DRC_errors | ||||
LVS_errors |
Figure 1
XNVR_136X32P128_VD01
foundry
eFabless engineering
N/A
180nm
X-Fab
N/A
EFXH018D
N/A
Contact Designer
schematic
1
1.0
Apr 16, 2019