The SYMPLL12_A2 is a high precision fully integrated phase locked loop clock generator suitable for low cost and high-performance applications. The PLL is an integer N clock generator that uses a 12MHz reference clock from a crystal to generate a wide range of output clocks from 750MHz to 1500MHz, with a 6MHz step. The output duty cycle is 50% ± 2.5%. The PLL is suitable for several high-performance applications like DDR, MIPI D-PHY/M-PHY, and Display port. The IP occupies small silicon area 250x500 um2