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Test platform for analog and mixed-signal designs.

  • 4 ADCs
  • 4 DACs
  • On-board ADC clock
  • SPI slave controller

Physical Parameters

Parameter Typical Minimum Maximum Units
device_area µm²
area µm²
width µm
DRC_errors
LVS_errors

Figure(s)

hydra_v4p0_symbol.svg

Figure 1

Performance Characteristics

Summary

Catalog ID

HYDRA_V4P0

IP Provider

N/A

Designer

eFabless engineering

Type

N/A

Node

180nm

Vendor

efabless

Foundry

N/A

Process

EFXH018D

Category

N/A

Certifications

Licensing

Info

Contact Designer

Maturity

Stage

layout

# of Tries

0

Library Package

Version

1

Version Date

Sep 14, 2019