Low Cost Custom ASIC for
Edge Device Applications
$70K - 20 WEEKS - 50 SAMPLES
Easy Fast Custom ASIC Creation
Leverage automated configurable design templates to rapidly generate your custom IC.
Specify your own SoC thru easy drop-down menus
Your SoC design is automatically generated and
fabricated thru the platform
Automated Design Generation
Complete the design yourself
OR
Utilize a turn-key service
Target Applications
The first SoC design template is targeted for IoT Edge Devices optimized for cost, performance, power and size.
Features:
- Single Cortex M0 processor
- Embedded SRAM up to 32KB
- Quad-SPI controller for off-chip Flash
- Range of analog and digital peripherals:
ADC, DAC, GPIO, SPI, timers, etc. - Option for a custom digital block
(e.g. accelerator) - Templates for X-FAB 180nm and GF 130nm process nodes
Target Applications:
- New products or product line extensions
- Second generation+ products looking to optimize cost or functionality
- Ideal applications: IoT Controllers, Intelligent
Sensing / Monitoring, Industrial, Manufacturing
Target Use Cases
Rapid PoC / Demonstration:
- Demonstration for their concept or novel IP leveraging a configurable SoC reference design
- Pre-regulation product testing for industries like Medical and Automotive
For Mature Nodes – the cost of development is driven by IP licenses, EDA tools and labor versus Silicon fabrication.
First Product Development:
- Initial or limited volumes that don’t support the business case for traditional design service providers
- Companies with limited resources / expertise
- The amount of labor to develop is significantly reduced by leveraging reference designs and design automation through the platform
Example ASIC for MEMS Sensor
Combines custom analog front-end with configurable SoC design template
- Leverage SoC design template for MCU-based ASIC controller
- Configuration optimized based on application requirements
- Leverages existing design for digital system design
- Integrated with user provided analog front-end
What Are The Benefits?
Custom SoC designs are automatically generated from a web-based UI using dropdown menus
Leverage Existing Designs and ExpertiseAllows you to create a full SoC without needing expertise for the full system design
FastDesigns are automatically generated along with software drivers and verification tests. Samples can be provided in as little as 20 weeks
Low NRE CostDesign time is reduced thru automated design generation. License fees for tools and IP are eliminated or deferred
Licensing costs for many IP are included as part of the solution
For IP with licensing costs, most are deferred until after initial samples
Mixed Signal Design with AnalogFull SoC / ASIC design capability including digital and analog devices
Custom Analog & Digital OptionsCustom analog and digital blocks can be requested and included to provide further customization
Open-source and Proprietary Designs / IPFlexibility to utilize and mix a growing portfolio of open-source and proprietary IP in your designs
What Are The Benefits of Custom Silicon?
Power and Performance Optimization
Power can be optimized through pruning unused features and intelligent management of peripherals. Speed can be accelerated by moving from FPGA to hard implementations.
Component and System Cost
Cost can be reduced by moving from complex off-the-shelf parts as well as integration many discrete components.
Reduce the Footprint of Electronics
Footprint is reduced through integration of discrete components into silicon and reducing board size.
Protection of Design Details
Implementing critical functions or designs in silicon protects from reverse engineering by competitors.
Easy Fast Custom ASIC Creation
Simple Fixed Pricing
Makes It Easy
Pricing incudes the delivery of 50 sample dies
Fabrication is based on scheduled foundry MPW shuttles
No IP licensing fees required for samples
Packaging included
EDA tool cost included -- Design Assisted and Roll-Your-Own services include use of EDA design flow on the Efabless platform
Dedicated shuttle pricing available upon request
Flexible Development Models
How It Works
Getting samples for your custom SoC is made easy and fast through a streamlined process on the Efabless platform.
Create an SoC Configuration
Create a custom configuration of an SoC using simple pulldown menus and a web-based wizard tool. Note any customization requirements.
Generate a Request
Submit a request to Efabless to create samples. We will contact you to confirm your order and any additional requirements before proceeding.
Get Your SoC Samples Parts
Get your SoC samples, either as packaged parts and/or on evaluation PCBAs. Use our example firmware to verify.
Move to Production
Transfer your design to a production mask. Lower upfront NRE by sharing mask and fabrication costs with other Efabless customers. Transition to an Efabless partner for long-term production and support.
Automated Design Generation
Configurations coming out of the web configurator automatically generate a top-level SoC model. After confirming configuration settings for each component, the SoC generator builds the set of Verilog files, testbenches and firmware stub files for the configuration.
Example Configuration and Layout
Raptor Demo Chip Block Diagram
Raptor Demo Chip Layout
Current Limitations
Only what is available through configuration of the design template
Generated design can be further customized manually
New design templates will be added over time to address new application requirements
IP SelectionIP selection based on a silicon-proven pre-integrated IP library
Custom IP can be included for specific design templates & New IP will be added over time
Generated design can be further customized manually
Technology Nodes and FoundriesThe technology node is specified based on design template
New technology nodes and foundries to be added over time
Support for On-chip RF & FlashIP for on-chip RF and Flash are currently not available. Options to integrate RF and Flash are available through a SIP integrated solution
Why Not Use An FPGA?
* Power calculations based on 32MHz clock and an activity factor of 0.1. FPGA is filled with 16-bit counters.Note - core voltage for the FPGA is 1.2V vs 1.8V for Raptor.
Efabless Simplifies
SoC Creation
Efabless platform and marketplace opens the market for custom SoC creation and delivery
- Scalable resources thru community
- Low-cost, fast delivery
- Collaborative & open
- Open SoC design templates
- Complete set of capabilities and resources
- Leverages a mature ecosystem around
Arm’s Cortex processor family
